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A platform-based design framework to boost many-core software development

机译:基于平台的设计框架,可促进多核软件开发

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摘要

Embedded software engineers are dealing with complex and large software codes, which will continue to grow. To achieve a cost-effective design, concomitant hardware and software development is required during early design phases. This paper presents an open-source platform based design framework that combines different ADLs and simulators aiming at improving embedded software productivity, targeting future many-core embedded systems. The proposed approach adopts three models: RTL-VHDL level; RTL-SystemC coupled to ISSs; PBD (Platform Based Design) using OVP. The software (operating system and user applications) is the same for both models. Therefore, the OVP modeling allows fast software validation and debuggability. With the SystemC-ISS, it is possible to accurate estimate performance and energy consumption. The low-level model enables, besides area estimation, the validation of low-level protocols, as the communication protocol, network interface or flow-control mechanisms between routers. Results evaluate execution time, simulation time, and the number of executed instructions for several benchmarks using the proposed approach. The OVP model presents in average five times faster than the RTL-SystemC model, and the RTL-SystemC up to 155 times faster than the RTL-VHDL model.
机译:嵌入式软件工程师正在处理复杂且庞大的软件代码,而这些代码将继续增长。为了实现经济高效的设计,在早期设计阶段就需要进行相应的硬件和软件开发。本文提出了一个基于开源平台的设计框架,该框架结合了不同的ADL和模拟器,旨在提高嵌入式软件的生产率,并针对未来的多核嵌入式系统。所提出的方法采用三种模型:RTL-VHDL级别; RTL-SystemC与ISS耦合;使用OVP的PBD(基于平台的设计)。两种型号的软件(操作系统和用户应用程序)相同。因此,OVP建模可实现快速的软件验证和可调试性。使用SystemC-ISS,可以准确估计性能和能耗。除了区域估计之外,低级模型还可以验证低级协议,例如路由器之间的通信协议,网络接口或流控制机制。结果使用提出的方法评估了执行时间,仿真时间以及几个基准的执行指令数。 OVP模型的平均呈现速度是RTL-SystemC模型的五倍,而RTL-SystemC则是RTL-VHDL模型的155倍。

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